iEthernet W5100 Embedded-Internet IC

March 20, 2007
iEthernet W5100 is a new, full- featured 10/100 Ethernet controller IC which includes a fully hardwired TCP/IP core as well as a PHY interface layer. W5100 is designed for embedded applications where ease of integration, stability, performance, size, and low system cost control are important considerations. W5100 is a memory-mapped hardware TCP/IP solution that allows even low-end microcontrollers ready-made Internet capabilities at full speed with no need for additional PHY layer ICs. Developed from the successful W3150A TCP/IP stack IC which contains a future-proofed 10/100 Ethernet MAC, W5100 allows engineers to off-load the burden of the TCP/IP stack into a second peripheral chip (complete with Ethernet MAC and PHY) with few peripheral components. This reduces product debug issues and speeds time-to-market with the design of the TCP/IP stack avoided, and the additional benefit of a more stable product. Simple 8-bit micros immediately have much more power since they no longer have the burden of TCP/IP protocols. TCP- offload improves overall system performance, reduces cost, power and size, increases robustness. Engineers no longer need to have detailed knowledge of TCP/IP since this is all accomplished within the IC. And now they can do it all in one IC - W5100! Designing W5100 was an ambitious project, since it contains not only the TCP/IP core of the existing W3XXX series of TCP/IP ICs, but also offers the PHY (Ethernet physical layer) in the same size IC and at a very similar price. This allows customers to save cost and valuable board real- estate. W5100's fully hardwired TCP/IP algorithm guarantees line speed with on-the-fly processing architecture that is independent of the main processor. It also eliminates a main processor’s overhead by offloading TCP/IP tasks and therefore enhances overall system performance - vital in multimedia streaming applications. W5100's hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE - protocols all used widely. Direct and indirect bus addressing is provided, as well as an SPI interface. Designed by Korea's Ethernet specialists WIZnet, this hardwired TCP/IP chip technology has been adopted worldwide both in OS- less devices (e.g. DVR, Remote Control) and OS- based (e.g.. Set-top Boxes, DTV). It provides higher performance and stability than any software Internet connectivity solution. Advantages of incorporating the TCP/IP stack in an IC include: system robustness, faster time-to-market, up to 25Mbps for even low-end microcontrollers or even non-OS systems, aimed at applications including media-streaming, home networking, serial-to-Ethernet, parallel-to-Ethernet, USB-to-Ethernet, security systems, factory automation, medical equipment, etc.